Title:  Principal Engineer

About ST Engineering

ST Engineering is a global technology, defence, and engineering group with offices across Asia, Europe, the Middle East, and the U.S., serving customers in more than 100 countries. The Group uses technology and innovation to solve real-world problems and improve lives through its diverse portfolio of businesses across the aerospace, smart city, defence, and public security segments. Headquartered in Singapore, ST Engineering ranks among the largest companies listed on the Singapore Exchange.

Our history spans more than 50 years, and our strategy is underpinned by our core values – Integrity, Value Creation, Courage, Commitment and Compassion. These 5 core values guide every aspect of our business and are embedded in our ST Engineering culture – from the people we hire, to working with each other, to our partners and customers.

About our Business – Advanced Networks & Sensors

Our Advanced Networks & Sensors business specializes in platform digitalization, advanced connectivity, and cutting-edge manufacturing. This diversity of capabilities presents a range of roles through which you can contribute to the development of innovative, secure, and patented products. Join our team and play a crucial role in developing tomorrow’s technology and connectivity solutions and services to sectors spanning defence, public security, government, and the commercial realm. Your work will have a global impact as we empower customers through advanced communications, intelligent sensors, and the deployment of AI-enabled Edge applications for mission-critical roles.

Together, We Can Make A Significant Impact

The CUAS Product Team is building next‑generation of Software Defined Radio (SDR) and Radar sensing platforms. We are seeking a Senior FPGA Engineer to architect, implement, and validate radar and communications baseband signal‑processing pipelines on modern FPGA platforms, tightly integrated with high‑speed ADC/DACs and RF front‑end hardware.

In this role, you will own the end‑to‑end radar/SDR signal‑processing workflow—from waveform design and algorithm prototyping, through fixed‑point modeling and RTL implementation, to timing closure, hardware‑in‑the‑loop (HIL) validation, and production readiness.

You will collaborate closely with RF, systems, embedded software, and test engineering teams to deliver robust, scalable, and high‑performance radar and SDR solutions for operational environments.

Be Part of Our Success

Architecture & Design

• Architect radar and SDR baseband processing chains, including:
  • Waveform generation (LFM/chirp, FMCW, phase‑coded, pulsed, CW)
  • Digital up/down conversion (DDC/DUC), filtering, FFT/IFFT
  • Range–Doppler processing, pulse compression, matched filtering
  • CFAR detection, clutter mitigation, and interference suppression
  • Beamforming and MIMO radar processing
  • Time, phase, and frequency synchronization
• Define radar signal‑processing architectures optimized for FPGA implementation, considering latency, throughput, dynamic range, and power.
• Partition algorithms across FPGA fabric, DSP slices, and embedded CPUs (SoC) for optimal performance and scalability.
• Design and develop high‑speed digital I/O subsystems, including JESD204B/C, PCIe, 10/25/100GbE, Aurora, and AXI4‑Stream interfaces.

Implementation & Verification

• Implement radar and DSP algorithms in VHDL, Verilog, or SystemVerilog, leveraging vendor IP and HLS where appropriate.
• Drive timing closure across complex, multi‑clock radar systems:
  • Setup/hold analysis
  • Clock domain crossings (CDC)
  • Deterministic latency and synchronization
  • Floor planning and resource/power optimization
• Develop comprehensive verification environments, including:
  • RTL testbenches and lightweight/UVM‑based verification
  • Hardware‑in‑the‑loop (HIL) testing using recorded and live RF data
  • Correlation of FPGA outputs against golden reference models

Modeling & Waveform Prototyping

• Design and prototype radar waveforms and signal‑processing algorithms using MATLAB/Simulink or Python (NumPy/SciPy).
• Perform fixed‑point analysis, SNR budgeting, and bit‑width optimization to ensure algorithm fidelity on FPGA.
• Establish and maintain bit‑true golden models aligned with RTL implementations.
• Generate, manage, and automate test vectors for continuous regression and performance validation.

Integration

• Interface FPGA baseband designs with RF front‑end hardware, including mixers, LNAs, filters, ADCs/DACs, clocks, PLLs, and synchronization networks.
• Collaborate with firmware and software teams on:
  • Radar control and configuration interfaces
  • DMA engines, Linux drivers, and kernel modules
  • High‑rate data transport and processing pipelines
• Integrate FPGA designs with radar and SDR frameworks, custom signal‑processing chains, and external command‑and‑control planes.

Validation & Production Readiness

• Lead lab bring‑up and debugging using spectrum analyzers, signal generators, VNAs, oscilloscopes, and logic analyzers.
• Perform radar‑specific performance characterization, including:
  • Range/Doppler resolution and accuracy
  • EVM, BER, SNR, detection probability, false‑alarm rates
  • Phase noise, spurs, jitter, and clock coherence analysis
• Support DFx (DFT/DFM), manufacturing tests, field diagnostics, and operational calibration.
• Contribute to EMC/EMI compliance planning for radar and SDR systems.

Process & Documentation

• Produce and maintain clear, traceable design documentation, including:
  • Signal‑processing and waveform specifications
  • Interface definitions and timing diagrams
  • State machines, test plans, and review artifacts
• Contribute to CI/CD pipelines for FPGA builds, automated testing, and regression using Git‑based workflows.

Qualities We Value

• Knowledge in Electrical Engineering, Communications Engineering, Computer Engineering, or related field.
• 3–7 years of experience in digital communications, DSP, or baseband algorithm development (drone/telemetry experience preferred).
• Experience with embedded systems and real-time signal processing.
• Hands-on exposure to FPGA/DSP hardware platforms and RF lab test equipment.
• Strong knowledge of digital modulation/demodulation schemes (FSK, QPSK, QAM, OFDM, etc.).
• Proficiency in forward error correction (FEC) methods (convolutional codes, RS, LDPC).
• Expertise in digital filter design (FIR, IIR, adaptive filtering, equalization).
• Skilled in DSP implementation on FPGA/DSP/embedded platforms (e.g., Xilinx, TI DSPs).
• Proficiency with MATLAB, Simulink, Python, C/C++ for simulation and implementation.
• Familiarity with RF test equipment (spectrum analyzers, VSAs, oscilloscopes).
• Willingness to participate in field trials and real-world testing under varying RF conditions.
• Singaporean only

Our Commitment That Goes Beyond the Norm

• An environment where you will be working on cutting-edge technologies and architectures.
• Safe space where diverse perspectives are valued, and everyone’s unique contributions are celebrated.
• Meaningful work and projects that make a difference in people’s lives.
• A fun, passionate and collaborative workplace.
• Competitive remuneration and comprehensive benefits.

Working Location: Jurong East